
PDI Description
Slave Controller – ET1200 Hardware Description III-33
6.2.8 SOF
SOF indicates the start of an Ethernet/EtherCAT frame. It is asserted shortly after RX_DV=1 or EBUS
SOF. Input data is sampled in the time interval between t
SOF_to_DATA_setup
and t
SOF_to_DATA_setup
after the
SOF signal is asserted.
6.2.9 OUTVALID
A pulse on the OUTVALID signal indicates an output event. If the output event is configured to be the
end of a frame, OUTVALID is issued shortly after RX_DV=0 or EBUS EOF, right after the CRC has
been checked and the internal registers have taken their new values. OUTVALID is issued
independent of actual output data values, i.e., it is issued even if the output data does not change.
6.2.10 Timing specifications
Table 37: Digital I/O timing characteristics ET1200
Input data valid before LATCH_IN
Input data valid after LATCH_IN
Input data valid after SOF, so that Inputs
can be read in the same frame
Input data invalid after SOF
Time between consecutive input events
Output data valid before OUTVALID
Output data valid after WD_TRIG
Not applicable for ET1200
Time between consecutive output events
Bidirectional mode: I/O valid before
OUTVALID
Bidirectional mode: I/O invalid after
OUTVALID
Bidirectional mode: time between
consecutive input or output events
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